๐งฉ What a DSL actually is
A Domain-Specific Language (DSL) is:
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Specialized: built for one domain (e.g., GPU kernels, ML ops, hardware verification, SQL for databases, Verilog for chips, HTML for markup).
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Higher-level than writing raw kernels or assembly.
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Designed to let developers write small, compact code that compiles down to extremely optimized low-level instructions.
GPU-kernel DSL examples
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Triton (for writing high-performance GPU kernels in Python-like syntax)
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TVM (tensor compiler DSL)
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Halide (image processing pipelines)
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CUDA C++ (not exactly a DSL but domain-specific)
These DSLs exist because raw CUDA/HIP/PTX/ISA is too low-level and optimizing by hand is time-consuming.
๐งจ Why people are saying “It’s not about the next DSL”
The context of the tweet you quoted:
"You're probably not ready for how dramatically the world of GPU kernel engineering will change in the next 12 months.
It's not about the next DSL. @makora_ai is generating SOTA kernels automatically. @AIatAMD GPUs running MLA twice as fast as H100…”
What this implies:
1️⃣ The old world:
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Humans write kernels by hand
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Or humans write DSL code (Triton/Halide/etc.)
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Performance tuning is manual: block sizes, tiling, memory coalescing, scheduling, vectorization, warp patterns, bank-conflict avoidance, etc.
2️⃣ The new world they are predicting:
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AI-generated kernels outperform hand-written or DSL-written kernels
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The AI does:
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Tiling strategies
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Warp scheduling
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Shared memory optimization
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Loop unrolling
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Prefetching
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Vectorization
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Architecture-specific MLIR lowering
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Autotuning
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Essentially:
๐ The AI becomes the DSL.
๐ The human doesn’t need to write kernels at all.
This is similar to what happened in compilers, but far more powerful: the model learns to produce SOTA kernels through gradient-free optimization, search, or reinforcement.
Makora, Sakana AI, Modular, and others are exploring this.
๐ง So why “It’s not about the next DSL”?
Because DSLs are a bridge between “human-friendly code” and “hardware-friendly code.”
If AI can:
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Read high-level descriptions
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Autogenerate the optimal kernel
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Autotune across GPU architectures
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Validate correctness
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Benchmark and refine recursively
…then humans no longer need to write DSL code.
This is the same argument people are making about AI replacing shader languages, query languages, even CUDA in the long run.
๐ What the AMD MLA comparison means
When they mention:
“AMD MLA running twice as fast as H100 across sizes below”
This is referencing benchmark graphs where AMD’s Mixed-Precision Matrix (MLA) architecture + AI-generated kernels achieve dramatically better throughput on certain batch sizes than NVIDIA H100 using standard libraries.
Not because the hardware is inherently 2× faster, but because:
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Handwritten/H100 kernels stagnate (NVIDIA keeps things locked behind cuBLAS/cuDNN)
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AI-generated kernels exploit architecture-specific tricks on AMD that humans never wrote
This is part of the narrative that AI-discovered kernels will unlock latent performance.
๐งฉ Summary you can copy-paste
DSL (Domain-Specific Language) is a small programming language specialized for a narrow task—like writing GPU kernels.
The point of the tweet is:
Future GPU performance won’t come from humans writing new DSLs. It will come from AI agents that automatically generate and autotune kernels that outperform hand-coded or DSL-coded ones. The DSL layer becomes unnecessary.
If you want, I can also explain:
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How these AI kernel-generators work internally
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Why recursive refinement/search/autotuning is the real bottleneck
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How this relates to your earlier question about “why it takes time to get it right”
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What this means for NVIDIA, AMD, and future ML compilers
Just tell me which direction you want to explore.