Notes

 neural arch vs researcher

https://x.com/shao__meng/status/2099281275370754227/photo/1 notes

reinventing ed as next token pred

https://www.interconnects.ai/p/open-source-ai-reading-list

https://deep-learning-alchemy.github.io/

design in 2 weeks

 https://x.com/semidoped/status/2094838495512563880

Univariate distribution relationships

Performance Architect

 

CMU 15-213 — Introduction to Computer Systems

This is an unusually good foundation for this job. It covers machine code, performance evaluation/optimization, computer arithmetic, memory organization, networking and concurrency.

CMU 15-213 course materials

If you don't already have a strong systems background, I would do this before diving deeply into SoCs.

Then:

CMU 15-740 — Computer Architecture

This is much closer to the actual Meta position. CMU describes it as a deep treatment of modern computer-system design, with particular emphasis on parallel systems and hardware/software interaction.

CMU 15-740 Computer Architecture

And if you become really serious:

CMU 18-742 — Computer Architecture and Systems

This is the research-level version: state-of-the-art architecture, architecture research, and a semester research project.

You do not need the PhD course to prepare for the job, though. 15-740 is the sweet spot.

Hennessy & Patterson — Computer Architecture: A Quantitative Approach

This is probably the one book I'd buy/read for this job.

The important word is quantitative.

You're not merely learning:

"A cache is faster than DRAM."

You're learning to ask:

"How much faster?"
"Under what workload?"
"What happens when 8 agents contend for the memory system?"
"How much bandwidth do we actually need?"
"Is the bottleneck computation, latency, bandwidth, or interconnect?"

That's exactly the mindset of the job.

. Then learn memory systems very deeply

This job specifically says:

SoC architecture, NoCs, memory subsystem, QoS

I'd spend an enormous amount of time here.

You want to be comfortable with:

CPU/accelerator → cache → LLC → memory controller → DRAM

and understand:

• latency
• bandwidth
• cache misses
• locality
• outstanding requests
• memory-level parallelism
• bank conflicts
• row-buffer behavior
• scheduling
• contention
• arbitration
• QoS
• fairness
• starvation
• tail latency

• MIT's computer architecture material is a good accessible starting point; its memory-hierarchy material explicitly frames memory as a pipeline bottleneck and explains the hierarchy used to alleviate it.

  ---

  5. Learn the Roofline model

  This is one of the first performance-analysis concepts I'd make second nature.

  The fundamental question is:

  Is my workload compute-bound or memory-bound?

  The Roofline model expresses this through arithmetic intensity:

  operations / bytes moved

  Low arithmetic intensity → memory bandwidth becomes the ceiling.

  High arithmetic intensity → compute throughput becomes the ceiling.

  NVIDIA has a very good practical explanation, including hierarchical Roofline analysis that lets you reason about different levels of the memory hierarchy.

  NVIDIA Roofline performance analysis

  This is worth learning by actually measuring programs, not just reading about it.

  ---

  6. The most important thing you could build

Jalapeno

 https://www.siliconcodesign.com/p/an-advanced-system-architecture-breakdown

https://x.com/jasonschips/status/2095084434185924625 - Hot chips 2026

https://x.com/QQ_Timmy/status/2095128760542790121 - Google training and inference

The Quest for Community: A Study in the Ethics of Order and Freedom

The Quest for Community: A Study in the Ethics of Order and Freedom 

 using category theory for middle income trap

https://x.com/EsmeLKPartridge/status/2094368404018725218

All you need is Geometric Algebra

 Seven Sketches in Compositionality: An Invitation to Applied Category Theory

https://www.proswit.com/jacobian_explained

All you need is Geometric algebra

AI chip architectures

 https://www.jacobpeake.com/ai-chip-architectures