EDA vs LLM

 

"Agent-based Systems for Automated Design Space Exploration in EDA"

"Automated Chip Design Using Machine Learning: A Review of Methods and Trends"

 "Formal Verification and AI in Semiconductor Design"

 "Reliability Challenges in AI-Driven Chip Design"

"Large Language Models for Electronic Design Automation"

"Verification in AI-Driven Design Automation: A Survey"

"Autonomous Design Agents in Engineering"

"The Evolution of Verification in Semiconductor Design"

https://www.viksnewsletter.com/p/the-cpu-bottleneck-in-agentic-ai

getting-into-ai-infra

 https://timzaman.com/getting-into-ai-infra

https://x.com/cosminnegruseri/status/2012041539137257544 - making llms practical

https://x.com/reinerpope/status/2044525525646119419 -  MatX, chip design and where silicon designed for LLMs is headed

https://x.com/FabianGloeckle/status/2044791592247066702 Formally verified code

https://aleximas.substack.com/p/how-will-ai-driven-automation-actually

Chipstack uses https://wavedrom.com/images/SNUG2016_WaveDrom.pdf

https://cheekypint.substack.com/p/reiner-pope-of-matx-on-accelerating 

(8:17) Tightly coupling SRAM and HBM on one chip (14:03) More MoE FLOPS, smaller KV cache load (16:08) Numerics: from 32-bit to 4-bit (19:02) Targeting both training and inference (22:14) Chip timelines (27:15) Logic and memory scarcity (29:42) Compute costs (32:07) Latency: from 20ms to 1ms as the new table stakes (40:50) Programming the chip (43:00) Starting MatX (47:11) Codesign without seeing the models (51:57) Interconnect design (55:44) Performance modeling philosophy (1:07:02) Prefill vs. decode (1:13:47) What's next

https://pdf.isaak.net/thesis - Scaling Brain emulation

https://x.com/danielhanchen/status/1931468866279932208 - FP8 in H100

Growing with AI

https://x.com/amanrsanger/status/1668144627004903424 probably needs update

https://x.com/dwarkesh_sp/status/2032493847666659780 Space GPUs

https://www.cs.cmu.edu/~213/schedule.html

Introduction to Computer Systems

EML operator

 https://x.com/cognitivecarbon/status/2043845129597796478

https://x.com/HowToAI_/status/2043753502850351525

https://github.com/Developer-Y/math-science-video-lectures

https://patricktoulme.substack.com/ - AI compilers

how Stanford trains it's engineers to build AI systems.

 https://x.com/RohOnChain/status/2043014662883786812

https://uchicago-llm-course.github.io/

https://x.com/AnjneyMidha/status/2042766393981219304 Frontier Visual Intelligence Systems with

@andi_blatt

from

@bfl_ml

career development -- https://news.ycombinator.com/item?id=40529067 Will Larson vs

Floating point

 https://essenceia.github.io/projects/floating_dragon/

Clock distribution network

 Clock distribution network

Async design

 lattrex building async design

Introduction to Asynchronous Circuit Design. Sparsø, Jens

Asynchronous research center