Saturday, September 05, 2026
Performance Architect
CMU 15-213 — Introduction to Computer Systems
This is an unusually good foundation for this job. It covers machine code, performance evaluation/optimization, computer arithmetic, memory organization, networking and concurrency.
If you don't already have a strong systems background, I would do this before diving deeply into SoCs.
Then:
CMU 15-740 — Computer Architecture
This is much closer to the actual Meta position. CMU describes it as a deep treatment of modern computer-system design, with particular emphasis on parallel systems and hardware/software interaction.
CMU 15-740 Computer Architecture
And if you become really serious:
CMU 18-742 — Computer Architecture and Systems
This is the research-level version: state-of-the-art architecture, architecture research, and a semester research project.
You do not need the PhD course to prepare for the job, though. 15-740 is the sweet spot.
Hennessy & Patterson — Computer Architecture: A Quantitative Approach
This is probably the one book I'd buy/read for this job.
The important word is quantitative.
You're not merely learning:
"A cache is faster than DRAM."
You're learning to ask:
"How much faster?"
"Under what workload?"
"What happens when 8 agents contend for the memory system?"
"How much bandwidth do we actually need?"
"Is the bottleneck computation, latency, bandwidth, or interconnect?"
That's exactly the mindset of the job.
. Then learn memory systems very deeply
This job specifically says:
SoC architecture, NoCs, memory subsystem, QoS
I'd spend an enormous amount of time here.
You want to be comfortable with:
CPU/accelerator → cache → LLC → memory controller → DRAM
and understand:
- latency
- bandwidth
- cache misses
- locality
- outstanding requests
- memory-level parallelism
- bank conflicts
- row-buffer behavior
- scheduling
- contention
- arbitration
- QoS
- fairness
- starvation
- tail latency
MIT's computer architecture material is a good accessible starting point; its memory-hierarchy material explicitly frames memory as a pipeline bottleneck and explains the hierarchy used to alleviate it.
5. Learn the Roofline model
This is one of the first performance-analysis concepts I'd make second nature.
The fundamental question is:
Is my workload compute-bound or memory-bound?
The Roofline model expresses this through arithmetic intensity:
operations / bytes moved
Low arithmetic intensity → memory bandwidth becomes the ceiling.
High arithmetic intensity → compute throughput becomes the ceiling.
NVIDIA has a very good practical explanation, including hierarchical Roofline analysis that lets you reason about different levels of the memory hierarchy.
NVIDIA Roofline performance analysis
This is worth learning by actually measuring programs, not just reading about it.
6. The most important thing you could build
Wednesday, September 02, 2026
Jalapeno
https://www.siliconcodesign.com/p/an-advanced-system-architecture-breakdown
https://x.com/jasonschips/status/2095084434185924625 - Hot chips 2026
https://x.com/QQ_Timmy/status/2095128760542790121 - Google training and inference
Monday, August 31, 2026
The Quest for Community: A Study in the Ethics of Order and Freedom
Sunday, August 23, 2026
Tuesday, August 04, 2026
Graph engineering
Stay tuned for English version book --- https://x.com/leafmeta/status/2083768641145938336
A graph contains not only what to do but also what is known. Furthermore, the latter is a much older concept—the lineage leading from knowledge graphs to ontology and the semantic web. Therefore, this book divides graph engineering into two tracks.
Knowledge Graph Engineering Track 1: What the Model Knows; Ontology, Schema, Source; Time, Quality, Verification.
Agent Graph Engineering Track 2: What the Model Does; State, Reducer, Superstep; Tools, Authority, Termination Conditions. Both are built with nodes and edges.