how good must a voltage reference be
https://www.analog.com/media/en/training-seminars/tutorials/MT-019.pdf
Crossing clock boundaries
http://www.ece.utep.edu/courses/web5375/Notes_files/ee5375_asynch.pdf
https://www.eetimes.com/understanding-clock-domain-crossing-issues/#
https://ieeexplore.ieee.org/document/6942125
http://www.eememes.com/2017/07/digitally-assisted-analog-circuits.html
https://www.edn.com/building-a-low-power-hold-friendly-scan-chain/
skew analysis
https://pages.hmc.edu/harris/research/tau99slides.pdf
CCD and not focusing on skew since local more dominant
https://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-8-CTS.pdf
Clock tree design for robust low power design
http://www.ispd.cc/slides/2006/8-1.pdf
International Symposium on Physical Design
http://www.ispd.cc/?page=archives
https://users.ece.utexas.edu/~mcdermot/
Clocking, Clock Skew, Clock Jitter, Clock Distribution
and some FM
http://users.ece.utexas.edu/~mcdermot/vlsi1/main/lectures/lecture_9.pdf
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