VLSI Test Principles and Architectures: Design for Testability

VLSI Test Principles and Architectures: Design for Testability by L.T Wang, C W Wu and X Q Wen

 miter circuit used for combinatorial equivalence checking

Test Principles

" testing can be viewed as a design moving through different abstraction levels"

"select specific test patterns based on circuit structural information and a set of fault models. This approach is called structural testing"

 "fault models are needed for fault simulation as well as for test generation."

Fault Modeling - Equivalent faults and fault collapsing

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits, by M.L. Bushnell and V.D. Agrawal

"Core problem: Find a test vector for a given fault.

Combine the “core solution” with a fault simulator into an ATPG system."

ATPG is a Search Problem

Need to deal with good vs faulty circuit -- Alternatively use multi valued algebra of signal values for both good and faulty circuit.

Binary Decision Diagram

Combinational Circuit Testing -- VLSI Test Technology and Reliability (ET4076)

Scan design makes sequential test combinational

"Designer gives small set of functional tests (~ 70% FC) Augment with structural tests to boost coverage to 98 + %"

Roth’s 5-Valued and Muth’s 9-Valued
ATPG algebra: higher order Boolean set of notation to presents both good and failing circuit simultaneously -- slide 10

Untestable faults in combinational circuits indicates redundant hardware

Boolean Difference Symbolic Method (Sellers et al.) - slide 14, Lecture 3, Chapter 7ATPG basics

Fault Sensitization

Fault propogation

Line Justification

D-frontier --- chain of D or Dbar

Forward implication

Backward implication

Implication Stack

Branch and Bound Search

Good project for students to implement the above in code.

Memory Testing