What is the CTL output for DFT?
Integrated Power Management, Leakage Control and Process Compensation Technology for Advanced Processes aka what are FF, SS corners.
Why SF and FS are skewed corners? (slide 10)
Multi corner multi mode analysis
Power challenges at 10nm and below [“At that time the dynamic power could mainly be taken care of with I/Os, memories, and clocks. If you did something good in those areas, it was fine and you did what you could in order to get it under control. That’s changing, and the logic component (the data path logic and control logic) is becoming a pretty significant portion of the total dynamic power within the chip. "]
Design rule violatio fixing in timing closure
Testing analog circuits becoming more difficult
Performance Robustness Analysis of VLSI Circuits with Process Variations Based on Kharitonov Theorem
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